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ASIMPS, Application Specific MEMS Processes, is a CMOS-MEMS monolithic approach offered through MEMSCAP's Multi User program in partnership with Jazz Semiconductor, Carnegie Mellon University, and SoftMEMS. This work was originally introduced and subsidized through a DARPA program that ended in 2003.

ASIMPS continues to operate through the collaborative team support of the partners: Jazz Semiconductor provides its SiGe60 CMOS process; Carnegie Mellon University provides fabrication support for the MEMS "release" process; and SoftMEMS provides CAD design and DRC support. MEMSCAP handles the marketing and administration efforts currently, and expects to add the MEMS "release" fabrication once the process is transferred to MEMSCAP’s U.S. operations in mid-2005.

About ASIMPS

In ASIMPS, microstructures are made from conventional CMOS followed by two maskless post-CMOS process steps. The top metal layer acts as a mask & protects the CMOS. The result is fine line, fine gap microstructures with low parasitic capacitance, multiple isolated conductors per structure, and built-in piezoresistors. Applications intended for this process include inertial sensors, RF MEMS, infrared sensors, and flow and force sensors.

To date, approximately ten runs have been fabricated for a captive customer base. The standard die space is 5mm x 5mm, though smaller sizes can be ordered in some cases. Cost varies by die size,though an approximate cost for a full die space is $16k(USD), with 5 released and 45 unreleased die shipped per order. The run schedule is dictated by Jazz's SBC35 (SiGe BiCMOS 0.35µm) MPW schedule, which can be found on the Jazz Semiconductor MPW web pages, though keep in mind that ASIMPS is not offered with every SBC35 run.

How To Order ASIMPS

Please contact us directly using the form provided under Contact Us. Prior to receiving detailed information about the process, a Non-Disclosure Agreement with Jazz Semiconductor must be in place. We also highly recommend attending at least one ASIMPS Short Course prior to design submission. Please use the form to indicate your interest.

About Jazz SiGe60 Process
SiGe60 is a mature, low power, cost-effective solution for both networking and wireless applications. Designers have the flexibility of using any combination of three bipolar (NPN) transistors, each of which provides a different optimization for power and speed. With a peak Ft of 62 GHz, it is a clear choice for innovative, high-performance applications. SiGe60 comes standard with three bipolar (NPN) transistors types, 3.3 volt CMOS, deep trench isolation, lateral PNP transistors, MIM and MIS capacitors, high-performance varactors, poly and N-well resistors, and high-Q inductors. SiGe60 options include a triple-well, three or four layers of metal, and a thick top-metal. More information on Jazz can be found on their website
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