SOIMUMPs was introduced to the market in 2003. Unlike PolyMUMPs, the process for SOIMUMPs was an offspring of the MEMSCAP Variable Optical Attenuator product, though the process today has been refined to make it more "multi-user friendly".

About The Process

SOIMUMPs starts with a Silicon-On-Insulator(SOI) wafer, which consists of a stack of handle wafer(fixed 400um), buried oxide, and device wafer. Both 10um and 25um device wafer thicknesses are processed in each lot so the designer has the option of either thickness (designers may also request chips from both thicknesses up to a quantity of 15 at no additional cost). Using one photolithography step on each side of the SOI wafer, SOIMUMPs allows the designer to pattern and etch both sides of the SOI wafer down to the buried oxide, enabling through-holes to pass light through. Two metal layers, one for bond pads and one for reflectivity, are included in the Standard Process. The minimum feature size in SOIMUMPs is 2um.

Devices that can be made in SOIMUMPs include: Gyros, Optical Devices, and Display Technologies.

Please click the links in the menu on the right for more detailed information on SOIMUMPs.

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